TTL – transistor transistor logic , RTL , Error Detection and Correction
Table of Contents
Error Detection and Correction , TTL – transistor- transistor logic , Register Transfer Level ( RTL)
Error Detection and Correction
The dynamic physical interaction of the electrical signals affecting the data pam of a memory unit may cause occasional errors in storing and retrieving the binary information. The reliability of a memory unit may be improved by employing error-detecting and error-correcting codes. The most common error detection scheme is the parity bit’ A parity bit is generated and stored along with the data word in memory.
The parity of the word is checked after reading it from memory. The data word is accepted if the parity of the bits read out is correct. If the parity checked results in an inversion. an error is detected, but it cannot be corrected. An error-correcung code generates multiple parity check bits thai are stored \\ ith the data word in memory. Each cbcck bit is a parity avera group of bits in the data word. When the word is read back from memory. The associated parity bits are also read from mernot) and compared with a new Hamming Code
One of the most common error-correcting codes used in RAMs was devised by R. W. Hamming.
In the Hamming code. k. parity bits are added 10an n-bit data word. forming a new word of n + k bits. The hit positions are numbered in sequence from I to n + k, These positions numbered as a power of2 arc reserved for the parity bits. The remaining bits are the data bits.
The code can be used with words of any length. Before giving the general characteristics of the code. we will illustrate its operation with a data word of eight bib .
Consider. for example. the 8-bil data word I10001no.We include ~ parity bits with the 8-bit word and arrange the 12 bits as follows: Bil position: I PI 2 3 4 5 6 7 8 9 10 II 12 Pl IP4 1 0 0 f\ 0 1 0 0
RTL full form
Register Transfer Level ( RTL)
The modules of a digital system are best defined by a set of registers and the operations that are performed on the binary information stored in them. Examples of register operations are shift, count, clear. and load. Registers are assumed to be the basic components of the digitalsystem. The flow and processing performed on the data stored in the registers are referred 10 as register transfer Operations, We’ll see subsequently how a hardware description language includes operation; that correspond to the register transfer operations of a digital system.A digital system is represented at the register transfer level (R1l..) when it is specified by the following three components:
1. The set of registers in the system.
2. The operations that are performed on the data stored in the registers.
The control that supervises the sequence of operations in the system. A register is a group of flip-fops that stores binary intonation and has the capability of performing o ne or more elementary operations. A register can load new information or shift the information to the right or the le ft. A counter is. considered a register that increments a number by a fixed value (e .g.• I ).A flip-flop is considered a one-bit register that can be set. cleared. or complemented. In fact. the flip -flops and associated gates of any sequential circuit can be called registers by this definition.
The operations executed on the information stored in registers are elementary operations that are perfumed in parallel on a data wor consisting of bits during one clock cycle. The data produced by the ope ration may replace the binary information that was in the register before the operation executed. Alternatively. me result may be transferred to another register (i.e.• an operation on a register may leave its contents unchanged). Th e digital circuits introduced in registers that implement elementary operations. A counter with a parallel load is able to perform me incremcnt-by-one and load operations. A bidirectional shift register is able to perform me shift-rig ht and shift-left operations.
The operations in a digital system are controlled by timing signals that sequence the operations in a prescribed manner. Certain conditions that depend on results of previous operations may determine the sequence of future operations. The outputs of the control log ic are binary variables that initiate the various operations in the system’s registers
.Information trasfer from one register to another is designated in symbolic form by mean s of a replacement operator. The denotes a transfer of the contents of register RJ into register R2—that is. a replacement of the contents of register R2 by the contents of register RJ. By definition. the contents of the source register RI do not change after the transfer. They are merely copied to RI . symbolizes the transfer and its direction: it points from the register whose con tents are being transferred and towards the register that will receive the contents . A control signal would determine when the operation actually executes.
Rl – Rl + R2 R3-R3 + IR4 – shrR4
Add contents of R2 to Rl (RI gets Rl + R2) Increment R3 by I (count upwards )
Shift right R4 Clear R5
1. Transfer operations. which transfer data from one register to another.
2. Arithmetic operations. which perform arithmetic on data in registers.
3. Logic operations. which perform bit manipulation (e.g., logical OR) of nonnumeric data in registers.
4. Shift operations. which shift data between registers.
The transfer operation does not change the information content of the data being moved from the source register to the destination register. The other three operations change the n content during the transfer. The register transfer notation and the symbols used to represent the various register transfer operations are not standardized. In this text, we employ two types of notation. The notation introduced in this section will be used informally to specify and explain digital systems at the register transfer level. The next section introduces the RTL symbols used in the Verilog HDL.
TTL Full Form
The original basic transistor- transistor logic (TTL) gate was a slight improvement over the DTL gate. As TIL technology progressed. improvements were added to the point where this logic family became widely used in the design of digital systems. Today. ~1 0 S and C ~ IOS logic. which will be discussed in Sections 10.7 and 10.8. are the dominant technologies in VLSI circuits.
There are several subfamilies or series of the TTL technology. The names and characteristics of eight TIL series appear in Table 10.2. Commercial TIL ICs have a number designation that starts with 74 and follows with a suffix that identifies the series. Examples are 740·t 74S86. and 74ALS161. Fan-out. power dissipation. and propagation delay were defined in Section The speed-power product is an important parameter used in comparing the various TIL series. The product of the propagation delay and power dissipation. the speed-power product is measured in picojoules (pJ ).A low value for this parameter is desirable. because it indicates that a given propagation delay can beachieved without excessive power dissipation. and vice versa.
The standard TIL gate was the first version in the TIL family. This basic gate v. as then designed with different resistor values to produce gates with lower power dissipation or with higher speed. The propagation delay of a transistor circuit that goes into saturation depends mostly on two factors: storage time and RC time constants. Reducing the storage time decreases he propagation delay. Reducing resistor values in the circuit reduces the RC time constants and decreases the propagation delay. Of course. the trade-off is higher power dissipation. because lower resistances draw more current from the power supply. The speed of the gate is inversely proportional to the propagation delay.
In the low-power TIL gate. the resistor values are higher than in the standard gate in order to reduce the power dissipation. but the propagation delay is increased. In the high-speed TTL gate. resistor values are lowered to reduce the propagation delay. but the power dissipation is increased. The Schottky TTL gate was the next improvement in the technology.
The effect of the Schottky transistor is to remove the storage time delay by preventing the transistor from going into saturation. This series increases the speed of operation of the circuit without an excessive increase in power dissipation. The low-power Schottky TTL sacrifices some speed for reduced power dissipation . It is equal to the standard TTL in propagation delay, but has only one-fifth the power dissipation. Further innovations led to the development of the advanced Schottky series, which provides an improvement in propagation delay over the Schottky series and also lowers the power dissipation.
The advanced low-power Schottky has the lowest speed-power product and is the most efficient series. The fast TTL family is the best choice for high-speed designs. All TTL series are available in S81 components and in more complex forms. such as MSI and LSI components. The differences in the TTL series are not in the digital logic that they perform, but rather in the internal construction of the basic NAND gale. In any case, TTL gates in all the available series come in three different types of output configuration:
1. Open-collector output
2. Totem-pole output
3. Three-state output
These three types of outputs are considered next, in conjunction with the circuit description of the basic TTL gate. (TTL Logic)
Open-Collector Output Gate
The basic TIL gate shown in Fig. 10.11 is a modified circuit of the D’TL. gate. The multiple emitters in transistor QI are connected to the inputs, Most of the time, these emitters behave like the input diodes in the DTL gate, since they form a pn junction with their common base. The base-collector junction of QJ acts as another pI! junction diode corresponding to DJ in the
DTL gate Transistor Q2 replaces the second diode. D2. in the DTL gale. The output of the TTL gate is taken from the open collector of Q3. A resistor connected to l ec must be inserted externally to the Ie package for the output to “pull up” to the high voltage level when Q3 is off; otherwise. the Output acts as an open circuit. The reason for not providing the resistor intern ally will be discussed later.
The two voltage levels of the TTL gate are 0.2 V for the low level and from ~ ,~ to 5 v for the high level. The basic circuit is a ~AND gate, If any input is low. the corresponding base-emitter junction in QJis forward biased. The voltage at the base of QJ is equal to the input voltage of 0.2 V pl u ~ a VHE drop of 0.7. or 0.9 V, In order for Q3 to start on ducting.
The path from QJto Q3 must overcome a potential of one diode drop in the base-collector pn junction of QJ and two VBE drops in Q2 andQ3. or 3 x 0″6 = 1.8 V. Since the base of QI is maintained at 0.9 V by the input signal. the output transistor cannot conduct and is cut off. The output level will be high if an external resistor is connected between the output and vee(or an open circuit if a resistor is not used).
If all inputs are high. both Q2 and Q3 conduct and saturate. The base voltage of QJ is equal to the voltage across its base-collector pn junction plus IWO VHE drops in Q2 and QJ. or about 0.7 x 3 = 2.1 V. Since all inputs are high and greater than 2.4 V. the base-emitter junctions of Q1 are all reverse biased. When output transistor QJ saturates (provided that it has a current path). the output voltage goes low to 0.2 V.
This confirms the conditions of a NAND operation. In the analysis presented thus far. we said that the base-collector junction of QJ act s like a pn diode junction. This is true in the steady-state condition. However. during the turnoff transition. Ql doe s exhibit transistor action. resulting in a reduction in propagation delay .When all inputs are high and then one of the inputs Is brought to a low level. both Q2 and Q3 start turning off. At this time. the collector j unction of QJ is reverse biased and the emitter is forward biased. so transistor QJ goes momentarily into the active region.
The collector current of QJ comes from the base of Q2 and quickly removes the noise immunity encountered. Without an external resistor. the output of the gate will be an open circuit when QJ is off. An open circuit 10an input of a TTL gate behaves as if it has a high level input (but a small amount of noise can change this to a low level) “when Q3 conducts, its collector will have a current path supplied by the input of the loading gate through Vee. The 4-k. 0 resistor. and the forward-biased base-emitter junction ” Open-collector gales are used in three major applications: driving a lamp or relay. Performing wired logic.
And constructing a common-bus system. An open-collector output can drive a lamp placed in its output through a limiting resistor. When the output is low. the saturated trasistor QJ forms a path for the current that turns the lamp on. When the output transistor is off. the lamp turn s off because there is no path for the current.