Phase Shift Keying
Table of Contents
Phase Shift Keying (PSK) is a digital modulation technique in which the sine and cosine inputs are changed at a specific time to change the phase of the carrier signal. So Wireless LANs, biometric, contactless operations, along with RFID and Bluetooth communications, all make extensive use of the PSK technique.
PSK is of two types, depending upon the phases the signal gets shifted. They are −
Binary Phase Shift Keying
Phase reversal keying or 2-phase PSK are other names for this. The sine wave carrier in this method undergoes two phase reversals, such as 0° and 180°. Since the message is the digital data, BPSK is essentially a Double Side Band Suppressed Carrier DSBSC modulation scheme.
Quadrature Phase Shift Keying
The sine wave carrier undergoes four phase reversals in this phase shift keying technique, including 0°, 90°, 180°, and 270°. Depending on the need, PSK can also be done by eight or sixteen values if these techniques are further extended.
The balance modulator, which has the carrier sine wave as one input and the binary sequence as the other, is the main component of the binary phase shift keying block diagram. The diagrammatic representation is shown below.
A balance modulator, which multiplies the two signals applied at the input, is used to modulate BPSK. The phase will be 0° for a binary input of zero, and it will be 180° for a high input. So The diagrammatic representation of the BPSK modulated output wave and its supplied input is shown below.
The direct input carrier or the inverted 180°phaseshifted input carrier, depending on the data signal, will be the modulator’s output sine wave.
A mixer with a local oscillator circuit, a bandpass filter, and a two-input detector circuit make up the BPSK demodulator’s block diagram. The diagram looks like this.
The first stage of demodulation is finished by recovering the band-limited message signal with the aid of the mixer circuit and band pass filter. So To regenerate the binary message bit stream, the base band signal, which is band-limited, is obtained. The bit clock rate is required at the detector circuit in the following stage of demodulation to produce the original binary message signal. The bit clock regeneration is simplified if the bit rate is a submultiple of the carrier frequency. A decision-making circuit may also be inserted at the second stage of detection to make the circuit more understandable.