IC 555 Timer and its Pin Configuration
Table of Contents
IC 555 Timer and IC 555 Pin Diagram
IC 555 Timer
A Monolithic timing circuit that can Generate precise and extremely stable time delays or Oscillations is the IC 555. Basically, the timer has two modes of operation
(i) Monostable (one – shot) Multivibrator
(ii) Astable (free running) Multivibrator
The important Features of the 555 timer are these:
(i) It operates on +5v to +18 v supply voltages
(ii) It has an adjustable duty cycle
(iii) Timing is from microseconds to hours
(iv) It has a current o/p
IC 555 PIN Diagram
Pin description: Pin 1: Ground:
We measure all voltages in relation to this terminal.
Pin 2: Trigger:
The size of the external trigger pulse applied to this pin determines the timer’s output (o/p).
Pin 3: Output:
Either between pin 3 and ground or between pin 3 and supply voltage are the two possible connections for a load to the o/p terminal.
i. When the input is low:
The sink current is the load current that flows through the load connected between Pin 3 and +Vcc and into the output terminal.
(ii) When the output is high:
Between Pin 3 and +Vcc, or an ON load, there is no current flowing through the load. The output terminal, however, delivers current to the normally OFF load. The source current is referred to as this current.
Pin 4: Reset:
When a negative pulse is apply to this pin,. The 555 timer can be reset (disabled). To prevent any false triggering. When the reset function is not in use,. The reset terminal should be connected to +Vcc.
Pin 5: Control voltage:
The trigger voltage and threshold both change. When an external voltage is apply to this terminal. In other words, the pulse width of the output waveform can be adjusted. By connecting a potentiometer between this pin and GND. To avoid any noise issues,. The control pin should always be grounded with a 0.01 capacitor when not in use.
Pin 6: Threshold:
This is the non inverting input terminal of upper comparator which monitors the voltage across the external capacitor.
Pin 7: Discharge:
This pin is connected internally to the collector of transistor Q1.
When the output is high Q1 is OFF.
When the output is low Q is (saturate) ON.
Pin 8: +Vcc
The supply voltage of +5V to +18V is applied to this pin with respect to ground.
Block Diagram of IC 555 Timer
From the above figure, three 5k internal resistors act as voltage divider providing bias voltage of 2/3 Vcc to the upper comparator & 1/3 Vcc to the lower comparator. It is possible to vary time electronically by applying a modulation voltage to the control voltage input terminal (5).
(i) In the Stable state:
The output of the control FF is high. This means that the output is low because of power amplifier which is basically an inverter. Q = 1; Output = 0
(ii) At the Negative going trigger pulse:
The trigger passes through (Vcc/3) the output of the lower comparator goes high & sets the
FF.Q = 1; Q = 0
(iii) At the Positive going trigger pulse:
It passes through 2/3Vcc, the output of the upper comparator goes high and resets the FF. Q = 0; Q = 1 The reset input (pin 4) provides a mechanism to reset the FF in a manner which overrides the effect of any instruction coming to FF from lower comparator.
Initially when the output is low, i.e. the circuit is in a stable state, transistor Q1 is ON & capacitor C is shorted to ground. The output remains low. During negative going trigger pulse, transistor Q1 is OFF, which releases the short circuit across the external capacitor C & drives the output high. Now the capacitor C starts charging toward Vcc through RA. When the voltage across the capacitor equals 2/3 Vcc, upper comparator switches from low to high. i.e. Q = 0, the transistor Q1 = OFF ; the output is high.
Since C is unclamped, voltage across it rises exponentially through R towards Vcc with a time constant RC (fig b) as shown in below. After the time period, the upper comparator resets the FF, i.e. Q = 1, Q1 = ON; the output is low.[i.e discharging the capacitor C to ground potential (fig c)]. The voltage across the capacitor as in fig (b) is given by
If the reset is applied Q2 = OFF, Q1 = ON, timing capacitor C immediately discharged. The output now will be as in figure (d & e). If the reset is released output will still remain low until a negative going trigger pulse is again applied at pin 2.
1. What are the applications of IC 555 Timer?
- · astable multivibrator
- · monostable multivibrator
- · Missing pulse detector
- · Linear ramp generator
- · Frequency divider
- · Pulse width modulation
- · FSK generator
- · Pulse position modulator
- · Schmitt trigger
2. List the applications of IC 555 timer in monostable mode of operation: *missing pulse detector
- *Linear ramp generator
- *Frequency divider
- *Pulse width modulation.
3. List the applications of IC 555 timer in Astable mode of operation:
4. Define IC 555 ?
The integrated circuit (IC) 555 timer was create specifically to carry out signal generation and timing tasks.
5.List the basic blocks of IC 555 timer?
- · A relaxation oscillator
- · RS flip flop
- · Two comparators
- · Discharge transistor.
6. List the features of 555 Timer?
- · It has two basic operating modes: monostable and astble
- · It is available in three packages. 8 pin metal can , 8 pin dip, 14 pin dip.
- · It has very high temperature stability.
7. Define duty cycle?
A mathematical concept called duty cycle determines the ratio of high output to low output periods. It is referre to as the ON Time to Total Time Ratio.
8. Define VCO
An oscillator circuit known as a voltage controlled oscillator allows the frequency of oscillations to be changed by an externally applied voltage.
9. List the features of 566 VCO.
- · Wide supply voltage range(10-24V)
- · Very linear modulation characteristics
- · High temperature stability
9. What do u mean by PLL?
A PLL is essentially a closed loop system. Created to match the frequency and phase of an input signal in the output signal.
11. Define lock range
PLL can capture frequency changes in the incoming signal. When it is locked. The term “lock range” refers to the range of frequencies over which the PLL can continue to maintain lock with the incoming signal.
12. Define capture range
The capture range refers to the range of frequencies over which the PLL can lock onto the input signal.
13. Define pull- in time
Pull-in time is the length of time required by the PLL to establish lock.
14. List the applications of 565 PLL
- · Frequency multiplier
- · Frequency synthesizer
- · FM detector
15. What are the two types of analog multiplier Ics?
a) IC AD 533
b) IC AD 534
16. What is ICAD 533?
It is a multiplier IC by analog devices. It is a low cost IC comprising a transconductance multiplying element,. Stable reference and an output amplifier.
17. List the features of ICAD533.
- · Its operation is very simple.
- · Only 4 external adjustments are necessary
- · Maximum 4 quadrant error is below 0.5%
18. What is ICAD 534?
It is a multiplier IC by analog devices. It is the first general purpose multiplier capable of providing gain upto X100.
19. List the features of ICAD534
- · Adjustable scale factor
- · Low noise
- · Excellent long time stability
20. List the few applications of ICAD534.
- · Multiplier
- · Divider
- · High quality signal processing