Amplitude Shift Keying
Table of Contents
A form of amplitude modulation called amplitude shift keying displays binary data as variations in the amplitude of a signal. A high frequency carrier exists in every modulated signal. When the binary signal is ASK modulated, the low input produces zero, while the high input produces the carrier output.
The following figure represents ASK modulated waveform along with its input.
Let’s learn how the ASK modulator functions so that we can determine how to obtain this ASK modulated wave.
Amplitude Shift Keying Modulator
The carrier signal generator, the binary sequence from the message signal, and the band-limited filter are all components of the ASK modulator block diagram. The ASK Modulator’s block diagram is provided below.
The carrier generator continuously broadcasts a high-frequency carrier. The unipolar input is either High or Low due to the binary sequence in the message signal. The switch is closed by the high signal, allowing a carrier wave. As a result, the carrier signal at high input will be the output. The switch opens when the input is low, preventing any voltage from appearing. The result will be a low output. The amplitude and phase properties of the band-limiting filter, also known as the pulse-shaping filter, determine how the band-limiting filter shapes the pulse.
There are two types of Amplitude Shift Keying Demodulation techniques. They are −
- Asynchronous ASK Demodulation/detection
- Synchronous ASK Demodulation/detection
So A synchronous method is one in which the clock frequencies at the transmitter and receiver match, causing the frequencies to be synchronized. If not, it is referred to as asynchronous.
Asynchronous ASK Demodulator
A low pass filter, a comparator, and a half-wave rectifier make up the Asynchronous ASK detector. The block diagram for the same is provided below.
The half-wave rectifier receives the modulated ASK signal and produces a positive half output. So The comparator outputs a digital output from the envelope detected output that the low pass filter produces after suppressing the higher frequencies.
Synchronous ASK Demodulator
A Square law detector, low pass filter, comparator, and voltage limiter make up a synchronized ASK detector. The block diagram for the same is provided below.
The Square law detector receives the input signal that has been ASK modulated. So The output voltage of a square law detector is inversely proportional to the square of the amplitude modulated input voltage. The lower frequencies are reduce by the low pass filter. So To obtain a pure digital output, the voltage limiter and comparator are use.