## AC And DC Characteristics of op amp, Slew Rate of op amp

Table of Contents

Characteristics of op amp, AC characteristics of op amp And DC Characteristics of op amp, Slew Rate of op amp

### Characteristics of op amp

There are various Characteristics of op amp. Here we discuss mainly two Characteristics of op amp

**AC characteristics of op amp****DC characteristics of op amp**

### AC characteristics of op amp

One needs to be aware of the AC characteristics of op amp, such as frequency response and slew rate, for small signal sinusoidal (AC) applications.

#### Frequency Response of AC characteristics of op amp

The variation in operating frequency will cause variations in gain magnitude and its phase angle. The manner in which the gain of the op-amp responds to different frequencies is called the frequency response. Op-amp should have an infinite bandwidth Bw =∞ (i.e) if its open loop gain in 90dB with dc signal its gain should remain the same 90 dB through audio and onto high radio frequency. The op-amp gain decreases (roll-off) at higher frequency what reasons to decrease gain after a certain frequency reached. There must be a capacitive component in the equivalent circuit of the op-amp. So For an op-amp with only one break (corner) frequency all the capacitors effects can be represented by a single capacitor C. Below fig is a modified variation of the low frequency model with capacitor C at the o/p.

##### There is one pole due to R0 C and one -20dB/decade. The open loop voltage gain of an op-amp with only one corner frequency is obtained from above fig.

f1 is the corner frequency or the upper 3 dB frequency of the op-amp. So The magnitude and phase angle of the open loop volt gain are fu of frequency can be written as, The magnitude and phase angle characteristics from eqn (29) and (30)

1. For frequency f<< f_{1} the magnitude of the gain is 20 log AOL in dB.

2. At frequency f = f_{1} the gain in 3 dB down from the dc value of AOL in dB. This frequency f1 is called corner frequency.

3. For f>> f_{1} the fain roll-off at the rate off -20dB/decade or -6dB/decade.

From the phase characteristics that the phase angle is zero at frequency f =0.

At the corner frequency f_{1} the phase angle is -45^{0} (lagging and a infinite frequency the phase angle is -90^{0} . It shows that a maximum of 90^{0} phase change can occur in an op-amp with a single capacitor C. Zero frequency is taken as te decade below the corner frequency and infinite frequency is one decade above the corner frequency.

**DC characteristics of op amp**

Op-amp inputs, which receive current from the source, react to current and voltage differently as a result of transistor mismatch.

DC output voltages are,

1. Input bias current

2. Input offset current

3. Input offset voltage

4. Thermal drift

**1. Input bias current:**

The op-amp‘s input is differential amplifier, which may be made of BJT or FET.

^{· }In an ideal op-amp, we assumed that no current is drawn from the input terminals.^{· }The base currents entering into the inverting and non-inverting terminals (I_{B}^{–}& I_{B}^{+}respectively).^{· }Even though both the transistors are identical, I_{B}^{–}and I_{B}^{+}are not exactly equal due to internal imbalance between the two inputs.^{· }Manufacturers specify the input bias current I_{B}

##### Op-amp with a 1M feedback resistor

V_{0} = 5000nA X 1M = 500mV

The output is driven to 500mV with zero input, because of the bias currents.

In application where the signal levels are measured in mV, this is totally unacceptable. This can be compensated. Where a compensation resistor Rcomp has been added between the non-inverting input terminal and ground as shown in the figure below.

##### Current I_{B}^{+} flowing through the compensating resistor R_{comp}, then by KVL we

-V_{1}+0+V_{2}-V_{o} = 0 (or)

V_{o} = V_{2} – V_{1} ——>(3)

By selecting proper value of R_{comp}, V_{2} can be cancelled with V_{1} and the V_{o} = 0. The value of R_{comp} is derived a

V_{1} =I=^{+}R_{comp} (or)

I_{B}^{+} = V_{1}/R_{comp} ——>(4)

The node =a‘ is at voltage (-V_{1}). Because the voltage at the non-inverting input terminal is (-V_{1}). So with Vi = 0 we get,

I_{1} = V_{1}/R_{1} ——>(5)

I_{2} = V_{2}/R_{f} ——>(6)

For compensation, Vo should equal to zero (V_{o} = 0, V_{i} = 0). i.e. from equation (3) V_{2} = V_{1}. So that,

I_{2} = V_{1}/R_{f} ——>(7)

KCL at node =a‘ gives,

I_{B}^{–}= I_{2} + I_{1}

I_{B}^{–} = R_{f}R_{1}

Assume I_{B}^{–} = I_{B}^{+} and using equation (4) & (8) we get

R_{comp} = R_{1} + R_{f}

R_{comp} = R_{1} || R_{f} —>(9)

i.e. to compensate for bias current, the compensating resistor, R_{comp} combination of resistor R_{1} and R_{f}.

**2. Input offset current:**^{}

Bias current compensation will work if both bias currents IB^{+} and IB^{–} are equal.^{}

Since the input transistor cannot be made identical. There will always be some small difference between I_{B}^{+} and I_{B}^{–}. This difference is called the offset current^{}

|I_{os}| = I_{B}^{+} -I_{B}^{–} -à(10)

Offset current I_{os} for BJT op-amp is 200nA and for FET op-amp is 10pA. Even with bias current compensation, offset current will produce an output voltage when V_{i} = 0.

##### Equation (16) the offset current can be minimized by keeping feedback resistance small.

^{· }Unfortunately to obtain high input impedance, R1 must be kept large.^{· }R_{1}large, the feedback resistor R_{f}must also be high. So as to obtain reasonable gain.

- The T-feedback network is a good solution. This will allow large feedback resistance, while keeping the resistance to ground low (in dotted line).
- · The T-network provides a feedback signal as if the network were a single feedback resistor.

By T to Π conversion,

To design T- network first pick R_{t}<<R_{f}/2

**3. Input offset voltage:**

Inspite of the use of the above compensating techniques, it is found that the output voltage may still not be zero with zero input voltage [V_{o} ≠ 0 with V_{i} = 0]. This is due to unavoidable imbalances inside the op-amp and one may have to apply a small voltage at the input terminal to make output (V_{o}) = 0.

This voltage is called input offset voltage V_{os}. This is the voltage required to be applied at the input for making output voltage to zero (V_{o} = 0).

Let us determine the Vos on the output of inverting and non-inverting amplifier. If Vi = 0 (Fig (b) and (c)) become the same as in figure (d).

**Total output offset voltage:**

The total output offset voltage VOT may differ from the output offset voltage caused by input bias current (IB) or input offset voltage alone in terms of magnitude (Vos).

This is due to the possibility that IB and Vos could have a positive or negative impact on the ground. As a result, many op-amps offer offset compensation pins to cancel out the offset voltage, giving the maximum offset voltage at the output of an inverting and non-inverting amplifier (figures b, c) without the use of any compensation technique.

^{· }10K potentiometer is placed across offset null pins 1&5. The wipes connected to the negative supply at pin 4.^{}

· The position of the wipes is adjusted to nullify the offset voltage

When the op-amps given (below) lack these offset null pins, external balancing techniques are employed.

## Balancing circuit of op amp

**Inverting amplifier**

**Non-inverting amplifier**

**Thermal drift:**

^{· }Bias current, offset current, and offset voltage change with temperature.^{· }A circuit carefully nulled at 25ºC may not remain. So when the temperature rises to 35ºC. This is called drift.^{· }Offset current drift is expressed in nA/ºC.^{· }These indicate the change in offset for each degree Celsius change in temperature.

## Circuit Stability of op amp

If the output of a circuit or group of connected circuits reaches a fixed value in a finite amount of time, the circuit or system is said to be stable. Or, if a system’s o/p rises over time rather than stabilising, it is said to be unstable. In actuality, an unstable system’s output keeps rising until it crashes. Systems that are unstable are unusable and must be made stable. When the system must pass a practical test, the stability criteria are used. Theoretically, Bode plots are always used to check a system’s stability.

Bode plots are compared of magnitude Vs Frequency and phase angle Vs frequency. Any system whose stability is to be determined can represented by the block diagram.

The block between the output and input is referred to as forward block and the block between the output signal and f/b signal is referred to as feedback block. The content of each block is referred

##### ―Transfer frequency From fig we represented it by AOL (f) which is given

by A_{OL} (f) = V_{0} /V_{in} if V_{f} = 0. —–(1)

where A_{OL} (f) = open loop volt gain. The closed loop gain A_{f} is given by

A_{F} = V_{0} /V_{in}

A_{F} = A_{OL} / (1+(A_{OL} ) (B) —-(2)

B = gain of feedback circuit.

B is a constant if the feedback circuit uses only resistive components. Once the magnitude Vs frequency and phase angle Vs frequency plots are drawn, system stability may be determined as follows

**1. Method:1:**

Determine the phase angle when the magnitude of (A_{OL} ) (B) is 0dB (or) 1. If phase angle is > .-180^{0} , the system is stable. However, the some systems the magnitude may never be 0, in that cases method 2, must be used.

**2. Method 2:**

Determine the phase angle when the magnitude of (A_{OL} ) (B) is 0dB (or) 1. If phase angle is > .-180^{0} , If the magnitude is –ve decibels then the system is stable. However, the some systems the phase angle of a system may reach -180^{0} , under such conditions method 1 must be used to determine the system stability.

**Slew Rate of op amp**

Another important frequency related parameter of an op-amp is the slew rate. (Slew rate is the maximum rate of change of output voltage with respect to time. Specified in V/μs).

**Reason for Slew rate:**

Outside of an op-amp oscillation, a capacitor is typically present at 0 volts. This capacitor keeps the input o/p voltage from rapidly changing. The formula for calculating the rate of increase in the capacitor’s voltage is

dV_{c}/dt = I/C ——–(1)

I -> Maximum amount furnished by the op-amp to capacitor C. Op-amp should have the either a higher current or small compensating capacitors.

For 741 IC, the maximum internal capacitor charging current is limited to about 15μA. So the slew rate of 741 IC is

SR = dV_{c}/dt |_{max} = Imax/C .

So For a sine wave input, the effect of slew rate can be calculated as consider volt follower -> The input is large amp, high frequency sine wave .

If V_{s} = V_{m}Sinwt then output V_{0} = V_{m}sinwt . The rate of change of output is given

dV_{0}/dt = V_{m} w coswt.

The max rate of change of output across when coswt =1

(i.e) SR = dV_{0}/dt |max = wV_{m}.

SR = 2∏fV_{m}

V/s = 2∏fV_{m} v/ms.

Thus the maximum frequency f_{max} at which we can obtain an undistorted output volt of peak value V_{m} is given by

f_{max} (Hz) = Slew rate/6.28 * V_{m} .

called the full power response. So It is maximum frequency of a large amplitude sine wave with which op-amp can have without distortion.